Adlink nanoX-BT Manuel d'utilisateur Page 23
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Noté. / 5. Basé sur avis des utilisateurs
nanoX-BT Page 23
3.3.13. Miscellaneous
Signal Pin # Description I/O PU/PD Comment
SPKR B32 Output for audio enunciator, the “speaker” in PC-AT systems O 3.3V
WDT B27 Output indicating that a watchdog time-out event has occurred. O 3.3V
THRM# B35 Input from off-module temp sensor indicating an over-temp situation. I 3.3V
THERMTRIP# A35 Active low output indicating that the CPU has entered thermal shutdown. O 3.3V
FAN_PWMOUT B101 Fan speed control. Uses the Pulse Width Modulation (PWM) technique to
control the fan’s RPM.
O OD 3.3V
FAN_TACHIN11
B102 Fan tachometer input for a fan with a two pulse output. I OD 3.3V PU 10k 3.3V
TPM_PP11
A96 Trusted Platform Module (TPM) Physical Presence pin. Active high. TPM
chip has an internal pull down. This signal is used to indicate Physical
Presence to the TPM.
I 3.3V No TPM
supported
3.3.14. SMBus
Signal Pin # Description I/O PU/PD Comment
SMB_CK B13 System Management Bus bidirectional clock line. Power sourced through 5V standby
rail and main power rails.
I/O OD
3.3VSB
PU 2k2
3.3VSB
SMB_DAT# B14 System Management Bus bidirectional data line. Power sourced through 5V standby
rail and main power rails.
I/O OD
3.3VSB
PU 2k2
3.3VSB
SMB_ALERT# B15 System Management Bus Alert – active low input can be used to generate an SMI#
(System Management Interrupt) or to wake the system. Power sourced through 5V
standby rail and main power rails.
I 3.3VSB PU 10k
3.3VSB
3.3.15. I2C Bus
Signal Pin # Description I/O PU/PD Comment
I2C_CK B33 General purpose I²C port clock output/input I/O OD 3.3VSB PU 2k2 3.3VSB Source SEMA BMC or BayTrail SOC as
alternative
I2C_DAT B34 General purpose I²C port data I/O line I/O OD 3.3VSB PU 2k2 3.3VSB Source SEMA BMC or BayTrail SOC as
alternative
3.3.16. General Purpose I/O (GPIO)
Signal Pin # Description I/O PU/PD Comment
GPO[0] A93 General purpose output pins. O 3.3V
PU 10K 3.3V After hardware RESET output low
GPO[1] B54 General purpose output pins. O 3.3V
PU 10K 3.3V After hardware RESET output low
GPO[2] B57 General purpose output pins. O 3.3V
PU 10K 3.3V After hardware RESET output low
GPO[3] B63 General purpose output pins. O 3.3V
PU 10K 3.3V After hardware RESET output low
GPI[0] A54 General purpose input pins. Pulled high internally on the
module.
I 3.3V PU 10K 3.3V PU not in PICMG suggest 10K
GPI[1] A63 General purpose input pins. Pulled high internally on the
module.
I 3.3V PU 10K 3.3V PU not in PICMG suggest 10K
GPI[2] A67 General purpose input pins. Pulled high internally on the
module.
I 3.3V PU 10K 3.3V PU not in PICMG suggest 10K
GPI[3] A85 General purpose input pins. Pulled high internally on the
module.
I 3.3V PU 10K 3.3V PU not in PICMG suggest 10K
- User’s Manual 1
- Revision History 2
- Preface 3
- Table of Contents 4
- 1. Introduction 8
- 2. Specifications 9
- 2.5. Video 10
- 2.6. Audio 10
- 2.7. LAN 10
- 2.8. Multi I/O and Storage 10
- 2.9. Power Specifications 10
- 2.10. Power Consumption 11
- 2.12. Environmental 11
- 2.14. Operating Systems 11
- Intel® Atom™ 12
- Intel® Celeron® 12
- “Baytrail” 12
- Side View 13
- All tolerances ± 0.05 mm 13
- Other tolerances ± 0.2 mm 13
- 3.1. AB Pin Definitions 14
- Row A Row B 15
- 3.3. AB Signal Description 18
- 3.3.3. DDI0 Channel 19
- 3.3.4. Gigabit Ethernet 19
- 3.3.5. SATA 20
- 3.3.6. PCI Express 20
- 3.3.7. Express Card 20
- 3.3.8. LPC Bus 21
- 3.3.9. USB 1.1/2.0 21
- 3.3.10. USB 3.0 Extension 22
- 3.3.12 22
- SPI (BIOS only) 22
- 3.3.13. Miscellaneous 23
- 3.3.14. SMBus 23
- 3.3.15. I2C Bus 23
- Page 24 nanoX-BT 24
- 3.3.19 25
- Power and Ground 25
- 4. Module interfaces 26
- 4.3. Status LEDs 28
- 4.4. XDP Debug Header 29
- 5.1.1. Voltages 31
- 5.1.2. Main Current 31
- 5.1.3. BMC Status 31
- 5.1.4. Exception Codes 32
- 5.1.5. BMC Flags 32
- 6. System Resources 33
- 6.3.1. PIC Mode 34
- 6.3.2. APIC Mode 34
- Page 36 nanoX-BT 36
- 6.6. SMBus Address Table 37
- 7. BIOS Setup 38
- 7.2. Main 39
- 7.2.6. System Management 40
- Page 42 nanoX-BT 42
- 7.3. Advanced 43
- 7.3.2. Memory 44
- 7.3.3. Graphics 44
- 7.3.4. SATA 45
- 7.3.5. USB 45
- 7.3.6. Network 46
- 7.3.7. PCI and PCIe 46
- 7.3.8. Super IO 48
- 7.3.10. Sound 49
- Page 50 nanoX-BT 50
- 7.3.12. Thermal 51
- 7.3.13. Miscellaneous 51
- 7.4. Boot 52
- 7.5. Security 54
- 7.6. Save & Exit 54
- 8.1. Checkpoint Ranges 56
- 8.2. Standard Checkpoints 56
- 8.2.2. SEC Beep Codes 57
- 8.2.3. PEI Phase 57
- Page 58 nanoX-BT 58
- 8.2.4. PEI Beep Codes 59
- 8.2.5. DXE Phase 59
- Page 60 nanoX-BT 60
- 8.2.6. DXE Beep Codes 62
- 8.2.7. ACPI/ASL Checkpoint 62
- 9. Mechanical Information 64
- 9.2. Thermal Solution 65
- 9.3. Mounting Methods 67
- 9.4. Standoff Types 68
- Safety Instructions 69
- Getting Service 70
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