Adlink nanoX-BT Manuel d'utilisateur Page 22
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- Table des matières
- MARQUE LIVRES
Noté. / 5. Basé sur avis des utilisateurs
Page 22 nanoX-BT
3.3.10. USB 3.0 Extension
Signal Pin Description I/O PU/PD Comment
USB_SSRX0-
USB_SSRX0+
A22
A23
Additional Receive signal differential pairs for the SuperSpeed
USB data path on USB0
I PCIE
USB_SSTX0-
USB_SSTX0+
B22
B23
Additional Transmit signal differential pairs for the SuperSpeed
USB data path on USB0
O PCIE AC coupled on Module
USB_SSRX1-
USB_SSRX1+
A25
A26
Additional Receive signal differential pairs for the SuperSpeed
USB data path on USB1
I PCIE Not supported
USB_SSTX1-
USB_SSTX1+
B25
B26
Additional Transmit signal differential pairs for the SuperSpeed
USB data path on USB1
O PCIE Not supported
3.3.11. USB Root Segmentation
XHCI Controller
Port 0
(1/2.0)
USB0- / A45
USB0+ / A46
USB1- / B45
USB1+ / B46
USB2- / A42
USB2+ / A43
USB3- / B42
USB3+ / B43
USB7- / B36
USB7+ / B37
EHCI Controller
P1 P2 P3 P4
P1-P4
SSP
1
P4
Port 1
(1/2.0)
Port 2
(1/2.0)
Port 3
(1/2.0)
Port 7
Client
P5
Port 0
(3.0)
USB_SSRX0-/A22
USB_SSRX0+/A23
USB_SSTX0-/B22
USB_SSTX0+/B23
ULPI
3.3.12.
SPI (BIOS only)
Signal Pin # Description I/O PU/PD Comment
SPI_CS# B97 Chip select for Carrier Board SPI BIOS Flash. O 3.3VSB Only supports CS0
SPI_MISO A92 Data in to module from carrier board SPI BIOS flash. I 3.3VSB
SPI_MOSI A95 Data out from module to carrier board SPI BIOS flash. O 3.3VSB
SPI_CLK A94 Clock from module to carrier board SPI BIOS flash. O 3.3VSB
SPI_POWER A91 Power supply for Carrier Board SPI – sourced from Module – nominally
3.3V.
The Module shall provide a minimum of 100mA on SPI_POWER.
Carriers shall use less than 100mA of SPI_POWER.
SPI_POWER shall only be used to power SPI devices on the Carrier
O P 3.3VSB
BIOS_DIS0# A34 Selection strap to determine the BIOS boot device. I PU 10K
3.3V
Carrier shall pull to
GND or leave not
connected
BIOS_DIS1# B88 Selection strap to determine the BIOS boot device. I PU 10K
3.3V
Carrier shall pull to
GND or leave not
connected
- User’s Manual 1
- Revision History 2
- Preface 3
- Table of Contents 4
- 1. Introduction 8
- 2. Specifications 9
- 2.5. Video 10
- 2.6. Audio 10
- 2.7. LAN 10
- 2.8. Multi I/O and Storage 10
- 2.9. Power Specifications 10
- 2.10. Power Consumption 11
- 2.12. Environmental 11
- 2.14. Operating Systems 11
- Intel® Atom™ 12
- Intel® Celeron® 12
- “Baytrail” 12
- Side View 13
- All tolerances ± 0.05 mm 13
- Other tolerances ± 0.2 mm 13
- 3.1. AB Pin Definitions 14
- Row A Row B 15
- 3.3. AB Signal Description 18
- 3.3.3. DDI0 Channel 19
- 3.3.4. Gigabit Ethernet 19
- 3.3.5. SATA 20
- 3.3.6. PCI Express 20
- 3.3.7. Express Card 20
- 3.3.8. LPC Bus 21
- 3.3.9. USB 1.1/2.0 21
- 3.3.10. USB 3.0 Extension 22
- 3.3.12 22
- SPI (BIOS only) 22
- 3.3.13. Miscellaneous 23
- 3.3.14. SMBus 23
- 3.3.15. I2C Bus 23
- Page 24 nanoX-BT 24
- 3.3.19 25
- Power and Ground 25
- 4. Module interfaces 26
- 4.3. Status LEDs 28
- 4.4. XDP Debug Header 29
- 5.1.1. Voltages 31
- 5.1.2. Main Current 31
- 5.1.3. BMC Status 31
- 5.1.4. Exception Codes 32
- 5.1.5. BMC Flags 32
- 6. System Resources 33
- 6.3.1. PIC Mode 34
- 6.3.2. APIC Mode 34
- Page 36 nanoX-BT 36
- 6.6. SMBus Address Table 37
- 7. BIOS Setup 38
- 7.2. Main 39
- 7.2.6. System Management 40
- Page 42 nanoX-BT 42
- 7.3. Advanced 43
- 7.3.2. Memory 44
- 7.3.3. Graphics 44
- 7.3.4. SATA 45
- 7.3.5. USB 45
- 7.3.6. Network 46
- 7.3.7. PCI and PCIe 46
- 7.3.8. Super IO 48
- 7.3.10. Sound 49
- Page 50 nanoX-BT 50
- 7.3.12. Thermal 51
- 7.3.13. Miscellaneous 51
- 7.4. Boot 52
- 7.5. Security 54
- 7.6. Save & Exit 54
- 8.1. Checkpoint Ranges 56
- 8.2. Standard Checkpoints 56
- 8.2.2. SEC Beep Codes 57
- 8.2.3. PEI Phase 57
- Page 58 nanoX-BT 58
- 8.2.4. PEI Beep Codes 59
- 8.2.5. DXE Phase 59
- Page 60 nanoX-BT 60
- 8.2.6. DXE Beep Codes 62
- 8.2.7. ACPI/ASL Checkpoint 62
- 9. Mechanical Information 64
- 9.2. Thermal Solution 65
- 9.3. Mounting Methods 67
- 9.4. Standoff Types 68
- Safety Instructions 69
- Getting Service 70
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