Adlink CSA-5100 Manuel d'utilisateur Page 34
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34
CS
A
-5100
BYPASS_BTN#
WDOG_REEST
LAN_BYPASS_LED#
Watchdog
(ITE IT8786)
LPC
BYPASS_LAN#
Active Low
Network
Controller
LAN IN
LAN OUT
PCH
Haswell CPU
CSA-5200
(Implemented by
HW)
BYPASS_BTN#
LAN[1,2,3,4]
RESET
WDOG_CTRL
Logical Blocks in the Watchdog Implementation
The watchdog is controlled by writing to the SuperIO registers. The BYPASS_LAN# signal
will indicate whether LAN bypass is activated. When the BYPASS_LAN# output is 0 (active-
low), the CSA-5100 hardware will bypass the LAN inputs (LAN1, LAN2, LAN3, LAN4). When
the BYPASS_LAN# output is 1 (inactive), the CSA-5100 hardware will take in the LAN inputs
for IP package inspection and security processing. The various pin functions are described
as follows.
• BYPASS_BTN#: issue a low pulse after the button is pushed. The BIOS routine will
read the bypass button status, then trigger BYPASS_LAN# when the button is
pushed. Linux watchdog software need NOT handle the BYPASS_BTN#.
• BYPASS_LAN#: active low. Both BIOS and Linux watchdog software can read and
change this GPIO status. LAN bypass is activated when BYPASS_LAN# is set to 0
(active-low).
• WDOG_CTRL: LPC bus. Both BIOS and Linux can control the SuperIO watchdog by
writing its registers over LPC bus.
• WDOG_RESET: issue low pulse when feeding fails. A system reset will be
triggerered if WDT_ENABLE is set to 1. After a system reset, BYPASS_LAN# is set
to 0 (active-low) automatically by the BIOS.
• LAN_BY_LED#, lit when BYPASS_LAN# is set to low. The feature is implemented by
pure hardware logic and there is no control required by BIOS/Linux software.
- CSA-5100 1
- Revision History 2
- Table of Contents 3
- 1 Overview 5
- 1.2 Block Diagram 6
- 1.3 Mechanical Overview 7
- 1.4 Mechanical Dimensions 9
- 1.5 Package Contents 10
- 2 Specifications 11
- 2.2 Software Support 12
- 2.4 Optional Accessories 12
- 3 Getting Started 13
- 3.5 Driver Installation 21
- 4 System Interfaces 22
- 4.1.4 USB 3.0 Connectors 23
- 4.2 Board Layout 24
- 4.3 Connectors and Jumpers 25
- 4.3.3 VGA Header (CNX1) 26
- 4.3.6 ATX Connector (CN19) 27
- 5 LAN Bypass Function 31
- 5.2 BIOS Settings 32
- 5.3.1 Overview 33
- BYPASS_BTN# 34
- 6 Watchdog Timer Programming 35
- 6.2 Deliverables 36
- 6.2.3 ioctl 37
- 6.3 Sample Code 38
- 7 BIOS Setup 41
- 7.2 Setup Menu 42
- 7.3 Navigation 42
- 7.4 Main Setup 45
- 7.5 Advanced BIOS Setup 46
- 7.5.1 ACPI Settings 47
- 7.5.2 CPU Configuration 47
- 7.5.3 SATA Configuration 49
- 7.5.4 PCH-FW Configuration 50
- 7.5.5 USB Configuration 50
- 7.5.7 IT8786 HW Monitor 52
- 7.5.8 Smart Fan Function 53
- 7.6 Chipset Setup 57
- 7.6.2.2 Memory Configuration 61
- 7.7 Boot Setup 62
- 7.8 Security Setup 63
- 7.9 Save & Exit Menu 64
- Safety Instructions 67
- Getting Service 69
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