Adlink LEC-BASE R1 Manuel d'utilisateur télécharger pdf (Page 20)

14 Interface Signals

2.1.9 I2S1

Table 2-13 lists the pin signals of the I2S1 header, which provides 6 pins in a single row with

0.098" (2.50mm) pitch. These pins are connected to the SMARC connector over the 3.3 volt

level shifter.

NOTE: Shaded table cells denote power or ground.

2.1.10 I2S2

Table 2-14 lists the pin signals of the I2S2 header, which provides 6 pins in a single row with

0.098" (2.50mm) pitch. These pins are connected to the SMARC connector over the 3.3 volt

level shifter.

NOTE: Shaded table cells denote power or ground.

2.1.11 I2S3

Table 2-15 lists the pin signals of the I2S3 header, which provides 6 pins in a single row with

0.098" (2.50mm) pitch. These pins are connected to the SMARC connector over the 3.3 volt

level shifter.

NOTE: Shaded table cells denote power or ground.

Table 2-13: I2S1 Signals (I2S1)

Pin # Signal

VDD_3V3

MCBSP1_FSX_3V (connected to SMARC pin S39)

MCBSP1_DX_3V (connected to SMARC pin S40)

MCBSP1_DR_3V (connected to SMARC pin S41)

MCBSP1_CLKX_3V (connected to SMARC pin S42)

GND

Table 2-14: I2S2 Signals (I2S2)

Pin # Signal

VDD_3V3

MCBSP2_FSX_3V (connected to SMARC pin S43)

MCBSP2_DX_3V (connected to SMARC pin S44)

MCBSP2_DR_3V (connected to SMARC pin S45)

MCBSP2_CLKX_3V (connected to SMARC pin S46)

GND

Table 2-15: I2S3 Signals (I2S3)

Pin # Signal

VDD_3V3

MCBSP3_FSX_3V (connected to SMARC pin S50)

MCBSP3_DX_3V (connected to SMARC pin S51)

MCBSP3_DR_3V (connected to SMARC pin S52)

MCBSP3_CLKX_3V (connected to SMARC pin S53)

GND

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